All Tech Notes

Type Secure Title & Description ID# Updated Size
Functional Differences Between CellularRAM 1.0 and CellularRAM 1.5 :  Discusses the functional difference between the CellularRAM 1.0 and CellularRAM 1.5 memory devices TN-45-01 08/2005 141.07 KB
CellularRAM Asynchronous and Mixed-Mode Slow-Clock WRITE Concerns:  Discusses the use of Micron CellularRAM-based devices in Mixed Mode operation and slow clock speeds TN-45-02 05/2005 100.22 KB
CellularRAM Multiplexed Async/Burst Operation:  Discusses multiplexing a non-multiplexed CellularRAM device at the substrate level TN-45-04 01/2009 687.75 KB
Density Migration for x16 Burst Multiplexed PSRAM Introduction:  Discusses the design differences to account for when migrating a burst multiplexed device from 16Mb to 64Mb TN-45-06 01/2006 65.9 KB
Implementing CellularRAM 2.0, x32 with Two CellularRAM 1.5 x16 Devices:  Documents how the x32 CR2.0 memory interface can be emulated using a two-die stack of x16 CR 1.5 devices TN-45-07 12/2006 107.52 KB
64Mb Async/Page CellularRAM P25A to P25Z Transition Guide:  Discusses migrating a design based on the async/page MT45W4MW16P (P25A) to the MT45W4MW16PC (P25Z) TN-45-08 10/2005 52.89 KB
64Mb Burst CellularRAM P25A to P25Z Transition Guide:  Discusses migrating a design based on the async/page/burst MT45W4MW16B (P25A) to MT45W4MW16BC (P25Z) TN-45-09 10/2005 64.45 KB
Designing Applications with the x16 Burst A/D Multiplexed Interface:  Discusses the differences between a burst non-A/D MUX and burst A/D MUX device TN-45-10 11/2005 83.73 KB
Using CellularRAM Memory to Replace UtRAM :  Assists migration from a 128Mb UtRAM design (K1B2816B6M) to Micron 128Mb CellularRAM memory (MT45W8MW16B). Both hardware and software changes are covered TN-45-13 01/2006 195.88 KB
Using CellularRAM Memory to Replace Fujitsu 3V FCRAM:  Discusses replacing Fujitsu 3V FCRAM with Micron CellularRAM memory TN-45-14 02/2006 195.22 KB
Row Boundary Crossing Functionality in CellularRAMâ„¢ Memory:  Explains row boundary crossing in Micron CellularRAM memory devices TN-45-15 11/2009 524.87 KB
Using CellularRAM Memory to Replace Fujitsu 1.8V FCRAM:  Discusses replacing Fujitsu 1.8V FCRAM with Micron CellularRAM memory TN-45-16 03/2006 208.91 KB
Using CellularRAM Memory to Replace Single- and Dual-Chip Select SRAM:  Discusses migrating a single- or dual-chip select SRAM design to Micron CellularRAM memory. Both hardware and software changes are covered. TN-45-17 01/2007 179.87 KB
Using CellularRAM Memory to Replace NEC Mobile Specified RAM (PD46128512):  Discusses migrating a 128Mb NEC Mobile Specified RAM design (PD46128512) to Micron 128Mb CellularRAM memory (MT45W8MW16B). Both hardware and software changes are covered. TN-45-18 03/2006 228.87 KB
Low-Power Options for Async/Page CellularRAM:  Discusses the low-power options available to customers on async/page CellularRAM memory devices TN-45-20 05/2006 197.19 KB
Variable vs. Fixed Latency CellularRAM Operation:  This technical note assists designers in understanding the differences between CellularRAM variable and fixed latency operations TN-45-22 07/2006 122.39 KB
Using CellularRAM Memory on a NOR FLASH Bus:  Discusses design considerations when placing a CellularRAM memory device on a NOR Flash bus TN-45-23 07/2006 391.96 KB
Fixed-Latency Operation in CellularRAM 1.0 Devices:  Details how Micron has enhanced CellularRAM CR1.0 functionality TN-45-24 08/2006 187.66 KB
Using Micron Asynchronous PSRAM with ADI ADSP-BF53x Blackfin Processors:  Describes the design requirements for a seamless memory connection between Analog Devices Blackfin processors and Micron 70ns, 8Mb asynchronous PSRAM devices TN-45-27 06/2007 265.86 KB
Using a Micron CellularRAM Device with the AMCC PPC405EZ Embedded Processor:  Describes the design requirements for a seamless memory connection between the PPC405EZ and a Micron CellularRAM device TN-45-28 02/2006 288.01 KB
Using Micron Asynchronous PSRAM with the NXP LPC2292 and LPC2294 Microcontrollers:  Describes the design requirements for a seamless memory connection between the NXP LPC2292 and LPC2294 family of microcontrollers and a Micron asynchronous PSRAM device TN-45-29 06/2007 255 KB
PSRAM 101: An Introduction to Micron CellularRAM and PSRAM:  Demonstrates PSRAM and CellularRAM memory advantages over other memory options for use in mobile handsets; and presents available configurations TN-45-30 05/2008 351.24 KB
Connecting Micron CellularRAM Devices with the Atmel Microcontroller:  Describes the preferred methods for connecting Micron CellularRAM devices to the Amtel microcontroller TN-45-33 06/2008 525.62 KB
NAND Flash Performance Increase :  Customers using the PAGE READ CACHE MODE operation provided in Micron NAND Flash devices will realize significant performance gains in systems requiring increased data volume at a much faster rate. TN-29-01 05/2007 205.94 KB
Small Block vs. Large Block NAND Devices:  Large-block NAND Flash devices offer significant performance increases over their small-block NAND Flash counterparts for READ, PROGRAM, and ERASE operations. TN-29-07 05/2007 387.87 KB
NAND Flash Security:  Using Micron NAND Flash security features to implement component and code authentication security solutions, designers can protect critical system components and proprietary system software from unwanted attacks and alterations. TN-29-11 05/2007 189.32 KB
Monitoring Ready/Busy Status in 2, 4, and 8Gb Micron NAND Flash Devices:  Four options for determining the NAND Flash ready/busy device status are presented with detailed explanations of each option. TN-29-13 05/2007 96.08 KB
NAND Flash Performance Increase with PROGRAM PAGE CACHE MODE Command:  This technical note discusses the benefits of PROGRAM PAGE CACHE MODE operations over normal PROGRAM PAGE operations. It also provides specific timing examples and instructions for performing PROGRAM PAGE CACHE MODE operations. Rev. C TN-29-14 02/2010 266.14 KB
Boot-from-NAND Using Micron MT28F1G08ABA NAND Flash with the Texas Instruments OMAP 2420 Processor:  Describes Boot-from-NAND using Micron MT29F1G08ABA NAND Flash with the Texas Instruments OMAP 2420 processor. TN-29-16 06/2007 435.55 KB
Booting from Embedded MMC:  Describes booting from an embedded ARM processor in the MMC environment TN-29-18 06/2008 282.02 KB
NAND Flash 101 - An Introduction to NAND Flash and How to Design It In to Your Next Product:  Provides an introduction to NAND Flash and how to design it into your next product. Rev. B TN-29-19 04/2010 968.5 KB
Improving NAND Flash Performance Using Two-Plane Command Enabled Micron Devices:  Describes the performance benefits of Micron two-plane commands, and provides implementation guidelines for making the best use of two-plane capabilities TN-29-25 09/2008 123.28 KB
NAND Flash Status Register Response in Cache Programming Operations:  Describes status register responses when operating in cache programming modes TN-29-26 06/2007 253.71 KB
Memory Management in NAND Flash Arrays:  Describes common NAND Flash memory-management methods for effective use of the NAND Flash memory array TN-29-28 12/2009 271.42 KB
Using COPYBACK Operations to Maintain Data Integrity in NAND Flash Devices:  Describes how to use COPYBACK operations in NAND Flash devices TN-29-41 10/2008 101.39 KB
Wear-Leveling Techniques in NAND Flash Devices:  Highlights the importance of wear leveling, explains two wear-leveling techniques, and discusses implementing wear leveling TN-29-42 10/2008 268.3 KB
NAND Flash Performance Improvement Using Internal Data Move:  NAND data management capabilities and higher system performance through NAND Flash internal data moves TN-29-15 03/2010 219.17 KB
IBIS Behavioral Models:  Micron has been a member of the IBIS Open Forum for many years and fully supports the IBIS specification. IBIS models for most Micron products are available for download from the Micron Web site. TN-00-07 11/2009 163.98 KB
Thermal Applications:  Defines a general method and criteria for measuring and ensuring that Micron components and modules do not exceed the maximum allowable temperature TN-00-08 05/2010 252.18 KB
Understanding Quality and Reliability Requirements for Bare Die Applications:  Describes the quality and reliability requirements for bare die applications TN-00-14 10/2009 152.83 KB
Recommended Soldering Parameters:  Defines the recommended soldering techniques and parameters for Micron Technology, Inc., products. TN-00-15 03/2007 69.09 KB
Uprating of Semiconductors for High-Temperature Applications:  Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer's environmental specifications TN-00-18 05/2010 428.33 KB
Understanding Signal Integrity:  Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life TN-00-20 12/2009 1.52 MB
SEMI Wafer Map Format:  Micron has adopted the wafer map file format approved by Semiconductor Equipment and Materials International (SEMI). With SEMI formatting, Micron's customers can be confident they will always receive consistent, compatible, reliable map files. TN-00-21 02/2009 110 KB
Thinning Considerations for Wafer Products:  Information on optimal wafer-thinning processes to meet specific customer requirements TN-00-19 10/2009 73.58 KB
Memory Module Serial Presence-Detect:  Describes how SPD is essential in helping to standardize the configuration, timing, and manufacturing information of memory modules TN-04-42 12/2009 505.83 KB
Comparing Module Parameters:  Compares module parameters. TN-04-49 03/2003 52.71 KB
High-Speed DRAM Controller Design:  Identifies and discusses five key areas of DRAM controller design TN-04-54 04/2008 1 MB
DRAM Module Form Factors:  Compares the most common DRAM module form factors TN-04-55 09/2009 435.56 KB
LVTTL Derating for SDRAM Slew Rate Violations:  Describes the proper setup and hold time derating when the slew rate during transition time violates specification. TN-48-09 11/2009 196.24 KB
Backward Compatibility for Faster SDRAM:  Reviews the timing differences between SDRAM generations and shows how the faster Micron parts are compatible with the slower parts TN-48-15 10/2005 79.21 KB
RLDRAM 2 Design Guide:  Describes the general features of circuit implementations using RLDRAM 2 memory architecture TN-49-01 06/2008 329.19 KB
Exploring the RLDRAM 2 Feature Set:  Outlines the performance-enhancing features offered by RLDRAM 2 architecture TN-49-02 12/2006 453.86 KB
RLDRAM 2 Clocking Strategies:  Addresses the operation of the RLDRAM 2 device outside the specified range of clock periods and the timing changes that occur in this mode of operation TN-49-03 05/2007 305.07 KB
Calculating Memory System Power for RLDRAM 2:  Details how RLDRAM 2 devices consume power and provides tools to estimate power consumption TN-49-04 11/2007 1.64 MB
Decoupling Capacitor Calculation for a DDR Memory Channel:  Provides a decoupling capacitor calculation for a DDR memory channel TN-46-02 12/2004 151.37 KB
Calculating DDR Memory System Power:  Describes how to calculate DDR memory system power. TN-46-03 03/2005 336.91 KB
General DDR SDRAM Functionality:  Describes DDR SDRAM functionality TN-46-05 12/2001 254.8 KB
Termination for Point-to-Point Systems:  Provides a basic understanding of transmission line theory that is important to insure signal integrity in today's high-speed digital systems. TN-46-06 03/2011 356.29 KB
DDR333 Design Guide for Two-DIMM Unbuffered Systems:  Describes DDR333 design guide for two-DIMM unbuffered systems TN-46-07 12/2002 5.93 MB
Designing for 1Gb DDR SDRAM:  Provides system designers with essential information relevant to utilizing the 1Gb double data rate (DDR) synchronous dynamic random access memory (SDRAM). TN-46-09 11/2009 175.43 KB
DDR SDRAM Point-to-Point Simulation Process:  Covers rarely addressed areas of the DDR SDRAM point-to-point simulation process TN-46-11 07/2005 330.05 KB
Power-Saving Features of Mobile LPDRAM:  Addresses the power-saving features and power calculations of low-power Mobile LPDRAM memory TN-46-12 05/2009 255.93 KB
Mobile LPDDR Versus Standard DDR SDRAM:  An overview of the functional and mechanical differences between low-power and standard DDR and a description of exclusive features of LPDDR TN-46-15 12/2007 432.44 KB
Interface Design Guide for STMicroelectronics Cartesio Microprocessor:  Guidelines for interconnecting the STA2062 dynamic bus controller to two Micron 512Mb Mobile LPDDR devices TN-46-18 08/2008 2.67 MB
Mobile LPDRAM Unterminated Point-to-Point System Design: Layout and Routing Tips:  Provides guidance for the development of multilayer board designs TN-46-19 11/2008 552.55 KB
Design Guide for Two-DIMM, Unbuffered Systems:  DDR2-533 memory design guide for two-DIMM, unbuffered systems TN-47-01 12/2009 614.72 KB
DDR2 SDRAM Offers New Features and Functionality:  Discusses the various changes in DDR2 technology and the resulting features and benefits TN-47-02 12/2006 400.7 KB
Module Pinout Decoder:  Provides sorted pin assignment tables and pin location figures for use in DDR2 DIMM signal identification, tracing, and troubleshooting TN-47-03 12/2004 215.46 KB
Calculating Memory System Power for DDR2:  Rev. B, Details how DDR2 SDRAM consumes power and provides tools to estimate power consumption in a given system TN-47-04 03/2011 1.04 MB
Power Solutions for DDR2 Notebook PCs:  Technical note providing general guidelines for designing power circuitry for DDR2 memory. Includes the DDR2 voltage requirements and encompasses a sample reference design focused on the Texas Instruments Incorporated (TI) TPS51116 DDR2 memory power solution. TN-47-05 04/2010 374.42 KB
DDR2 Simulation Support:  Covers DDR2 simulation, adding to Micron's extensive array of design support tools for system designers TN-47-07 05/2005 127.84 KB
DDR2 Package Sizes and Layout Requirements:  Covers DDR2 package sizes and layout requirements TN-47-08 11/2005 614.31 KB
DDR2 tCKE Power-Down Requirement:  Describes the tCKE timing parameter of DDR2 SDRAM. TN-47-14 04/2010 102.03 KB
Designing for High-Density DDR2 Memory:  Focuses on designing for high-density memory—addressing schemes of each density, configurations, and the subtle differences between the 4-bank and new 8-bank DDR2 devices TN-47-16 12/2009 284.38 KB
Designing for High-Density DDR2 Memory (Japanese):  Focuses on designing for high-density memory's addressing schemes of each density, configurations, and the subtle differences between the 4-bank and new 8-bank DDR2 devices TN-47-16 12/2005 518.03 KB
DDR2 SODIMM Optimized Address/Command Nets:  Provides the system-level designer with an overview of the DDR2 SODIMM family and offers insight into termination techniques utilized on the commands and addresses for these modules TN-47-17 05/2005 592.56 KB
DDR2 (Point-to-Point) Features and Functionality:  Rev B. Focuses on the unique memory requirements of point-to-point design layouts and describes DDR2 features and functionality TN-47-19 03/2011 706.41 KB
DDR2 (Point-to-Point) Package Sizes and Layout Basics:  General guidelines for developing the PCB floor plan TN-47-20 06/2007 408.8 KB
FBDIMM Channel Utilization (Bandwidth and Power):  Newly introduced FBDIMMs offer virtually unlimited scalability of density, a significantly reduced number of routed motherboard signals, and high bandwidth solutions, all with an extremely reliable channel protocol TN-47-21 12/2009 1.21 MB
Designing for 1.5V, Low-Power FBDIMMs:  Discusses memory power trends and identifies new low-voltage solutions for high-density DDR2 memory designs TN-47-22 05/2008 980.89 KB
DDR2 Read Functionality (Japanese):  Describes READ functionality in DDR2. TN-47-13 12/2004 243.68 KB
Understanding Signal Integrity (Japanese):  Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life TN-00-20 06/2005 1.09 MB
DDR SDRAM Point-to-Point Simulation Process (Japanese):  Covers rarely addressed areas of the DDR SDRAM point-to-point simulation process TN-46-11 07/2005 491.77 KB
TN-46-13 (Japanese):  TN-46-13 TN-46-13 12/2005 637.61 KB
TN-47-09 – Japanese:  TN-47-09 TN-47-09 12/2005 245.15 KB
Interfacing SDRAM Devices with Motorola's MPC8xx:  Describes how to interface SDRAM devices with Motorola's MPC8xx TN-48-12 12/2001 176.99 KB
Designing in SDRAM for Future Upgrades:  Describes how to design in SDRAM for future upgrades TN-48-08 03/2004 126.15 KB
Calculating Memory System Power For DDR3 :  Details how DDR3 SDRAM consumes power and provides the tools that system designers can use to estimate power consumption. TN-41-01 05/2007 1.12 MB
DDR3 ZQ Calibration:  Describes how the DDR3 SDRAM driver design has been enhanced TN-41-02 02/2008 250.61 KB
DDR3 Dynamic On-Die Termination :  With DDR3, dynamic ODT provides systems with increased flexibility to optimize termination values for different loading conditions TN-41-04 03/2008 370.26 KB
DDR3 Termination Data Strobe :  Provides guidelines for using the TDQS feature to reduce signal integrity issues associated with mismatched DQS loading in in combined x4-based/x8-based systems TN-41-06 03/2008 152.41 KB
DDR3 Power-Up, Initialization, and Reset:  Describes power-up, initialization, and reset with DDR3. TN-41-07 10/2008 504.77 KB
Design Guide for Two DDR3-1066 UDIMM Systems:  Rev. B, Design guide to assist board designers implementing products using UDIMM systems TN-41-08 01/2010 1.1 MB
Micron® ECC Module for NAND Flash via Xilinx® Spartanâ„¢-3 FPGA:  Micron® ECC module was developed and tested using Xilinx® Spartanâ„¢-3 and can be ported to certain other platforms of the user’s choosing. TN-29-05 05/2007 997.75 KB
Micron® NAND Flash Controller via Xilinx® Spartanâ„¢-3 FPGA:  Describes the Micron NAND Flash controller, techniques for interfacing the NAND Flash device with a processor, and use of the Micron glueless interface to interface a processor with NAND Flash memory. TN-29-06 06/2007 872.4 KB
TN-29-37: Comparing 40 and 50-Series SLC NAND Flash Devices:  Prior to conversion, Micron recommends that the target design take into account the product data sheet and the specific changes highlighted in this technical note. This Technical note covers the M58A, M59A & M50A products. TN-29-37 01/2009 728.87 KB
Moisture Absorption in Plastic Packages:  Describes shipping procedures for preventing memory devices from absorbing moisture and recommendations for baking devices exposed to excessive moisture TN-00-01 02/2010 87.26 KB
NAND Flash Controller on Spartan-3:  This technical note describes the Micron NAND Flash controller, techniques for interfacing the NAND Flash device with a processor and use of the Micron glueless interface to interface a processor with NAND Flash memory. TN-29-06 06/2007 872.4 KB
ECC Module for Xilinx Spartan-3:  Describes the Micron® ECC module that was developed and tested using Xilinx® Spartanâ„¢-3 and can be ported to certain other platforms of the user’s choosing. TN-29-05 05/2007 997.75 KB
Accelerate Design Cycles with Simulation Models:  Micron supplies the tools and guidelines necessary to verify new designs prior to layout. This technical note discusses software model support, signal integrity optimization, and logic circuit design. TN-00-09 02/2010 206.91 KB
Determining NAND Flash Ready/Busy Status:  Systems that utilize NAND Flash memory can use either the ready/busy pin or the status register to determine whether a Micron® NAND Flash device is busy or ready to accept a new command. This technical note addresses the use of status register bit 5, which indicates the ready/busy status of the NAND Flash device. TN-29-13 02/2010 136.48 KB
Hardware Tips for Point-to-Point System Design:  Provides hardware tips for point-to-point system design, termination, and layout TN-46-14 06/2008 376.6 KB
DDR3 Mini-DIMMs – Register Not Always Required:  Explanation of why DDR3 Mini-UDIMMs are the best choice for systems that don't actually require registered DIMMs. TN-41-10 04/2010 225.12 KB
TN-29-51: Migrating from 50-Series to 60-Series SLC NAND Flash Devices:  Migrating from 50-Series to 60-Series SLC NAND Flash Devices; M58A, M59A, M50A, M68A, M69A, M60A TN-29-51 05/2011 121.59 KB
Long-Term Mobile SDRAM Support: Replacements for Mobile SDRAM 128Mb Devices:  Replacements for Mobile SDRAM 128Mb Devices Rev. A TN-48-17 06/2010 54.83 KB
TN-29-52: Migrating 1Gb 48nm and 2Gb/4Gb 57nm SLC NAND Flash Memory to 34nm:  Provides guidelines for migrating 1Gb 48nm and 2Gb/4Gb 57nm SLC, large-page NAND Flash memory to 34nm technology (M60A, M69A & M68A) TN-29-52 10/2010 180.46 KB
TN-10-08: LPDDR - Thermal Implications for Die Stacks:  This technical note presents a case study of a handset simulation in which an LPDRAM is stacked on an application processor (PoP) and the resulting thermal-profile modeling. This note also explains how thermal detection features included in LPDDR and LPDDR2 can be used to monitor the junction temperature of the memory, enabling the application to detect and compensate when the junction temperature exceeds the specified operating temperature. TN-10-08 07/2010 402.86 KB
Migrating 512Mb 57nm SLC NAND Flash Memory to 70nm:  Provides guidelines for migrating 512Mb 57nm SCL, small-page NAND Flash memory to 70nm technology. 08/2010 84.64 KB
Initialization Sequence for DDR SDRAM:  Describes the initialization sequence and configurable device parameters. TN-46-08 08/2010 294.95 KB
Design Guide - Dealing with DDR2/DDR3 Clock Jitter:  Explores DDR2/DDR3 clock jitter specifications and provides guidance on how to apply them and how to deal with violations TN-04-56 09/2008 272.53 KB
TN-29-17: NAND Flash Design and Use Considerations:  Describes design and use considerations for NAND Flash memory, focusing on bad-block identification and error correction. TN-29-17 09/2010 226.04 KB
The SMART Command Feature Set:  TN-FD-03: The SMART Command Feature Set TN-FD-03 09/2010 485.87 KB
Comparing P5Q Serial PCM and NOR Flash SPI Memory:  Comparing the features of the 128Mb P5Q serial PCM and NOR Flash SPI memory devices enables users to migrate applications from NOR Flash memory to P5Q serial PCM memory. AN310052 11/2011 146.41 KB
Comparing P8P Parallel PCM and Parallel NOR Flash Memory:  Comparing the features of the 128Mb P8P parallel PCM and parallel NOR Flash memory devices enables users to migrate applications from NOR Flash to P8P parallel PCM. AN310053 11/2011 229.34 KB
Migrating from a Chip Enable Care to a Don't Care NAND Flash Memory:  The purpose of this application note is to highlight the differences between Chip Enable don’t care and Chip Enable care devices. AN2365 10/2010 265.78 KB
Numonyx Wireless Flash Memory (W18, 64-Mbit) SCSP Family Design Guide:  This document provides the system designer with a set of guidelines for designing a system using Numonyx Wireless Flash Memory Stacked Chip Scale Package (SCSP) family of devices. AN-766 10/2010 202.15 KB
Numonyx Flash Memory Programming Algorithm Optimizations:  This application note suggests methods to help you optimize your programming algorithms for quicker Numonyx Flash Memory programming times. AN-759 10/2010 38.1 KB
Migration Guide for Numonyx Wireless Flash Memory (W18) to Numonyx StrataFlash Wireless Memory (L18):  This application note describes the process for migrating from the Numonyx Wireless Flash Memory device (W18/W30) to the Numonyx StrataFlash wireless memory device (L18/L30). AN-753 10/2010 348.08 KB
Migration Guide: Numonyx Synchronous StrataFlash Memory (K3) to Numonyx StrataFlash Wireless (L18/L30) Memory:  This application note describes the process for migrating from the Numonyxâ„¢ Synchronous StrataFlash® memory device (K3/K18) to the Numonyxâ„¢ StrataFlash® wireless memory device (L18/L30). AN-754 10/2010 328.96 KB
Schematic Review Checklist for Numonyx StrataFlash Wireless Memory (L18/L30) and Numonyx Wireless Flash Memory (W18/W30):  This document provides hardware design information for system designers using the Numonyx StrataFlash Wireless Memory (L18/L30) and the Numonyx Wireless Flash Memory (W18/W30) devices. AN-783 10/2010 181.58 KB
Introduction to On-Board Programming with Numonyx Flash Memory:  This application note describes the strengths, limitations, programming methods, and design considerations for on-board programming of NOR Flash memory devices. AN-624 11/2010 87.42 KB
Simplify Manufacturing by Using Automatic-Test-Equipment for On-Board Programming:  This document describes using automatic-test-equipment (ATE) to program Numonyx NOR Flash memory components on a PCB. AN-629 11/2010 440.67 KB
Designing for On-Board Programming Using the IEEE 1149.1 (JTAG) Access Port:  This document provides information on an alternative on-board programming method for small form factor PCB applications using the Joint Test Action Group Test Access Port (JTAG TAP) to perform OBP. AN-630 11/2010 81.75 KB
Designing for Successful Flash Memory Read and Verify Operations:  This document provides hardware and software techniques to eliminate read and verify problems caused by VCC and GND transient voltage spikes. AN-679 12/2010 79.54 KB
Reduce Manufacturing Costs with Numonyx Flash Memory Enhanced Factory Programming:  This application note explores EFP benefits, limitations, technical concepts and shares empirical data comparing EFP on various programming systems. AN-738 11/2010 77.04 KB
Improving Programming Throughput of Automated Flash Memories:  Provides concepts that can be employed to accelerate programming of write-automated flash memories in manual/automated device programmers, ATE, JTAG/HSS implementations, and in-system write applications. AN-678 11/2010 534.29 KB
Numonyx StrataFlash Memory J3A to J3C Migration Guide:  This document provides a seamless migration path from the Numonyx StrataFlash memory (J3A) device to the Numonyx StrataFlash memory (J3C) device. AN-792 11/2010 83.5 KB
Using IBIS Models to Validate Your Design:  This application note explains how Input/output Buffer Information Specification (IBIS) simulation models help design engineers identify flaws in PCB layouts early in the product development cycle. AN-804 11/2010 191.24 KB
Numonyx StrataFlash Wireless Memory (L30) to Intel PXA255 Processor Design Guide:  This application note provides information about interfacing the Numonyx StrataFlash Wireless Flash Memory (L30) device to the Intel PXA250 Applications Processor, including some general concepts about interfacing to the integrated features and control signals of the L30 device. AN-805 11/2010 277.05 KB
Numonyx StrataFlash Wireless Memory (L18) to Intel PXA270 Processor Design Guide:  This application note describes interfacing the Numonyx StrataFlash Wireless Memory (L18) to the Intel PXA27x Processor, and discusses some general concepts involved when interfacing to the integrated features and control signals of the L18. AN-806 11/2010 297.29 KB
Migration Guide for Numonyx Wireless Flash Memory (W18, 130nm) to Numonyx Wireless Flash Memory (W18, 90nm):  This application note describes migrating from the Numonyx Wireless Flash Memory (W18 130 nm) device to the Numonyx Wireless Flash Memory (W18 90 nm) device. AN-826 11/2010 312.22 KB
Conversion Guide: Numonyx Embedded Flash Memory (32, 64, and 128 Mbit) J3 v. D to J3 65nm:  This document provides information to assist customer conversion from the Numonyx Embedded Memory (J3 v. D) to Numonyx Embedded Memory (J3 65nm) Single Bit per Cell (SBC) device, including a description of key hardware and software differences. AN-308038 11/2010 200.03 KB
How to Migrate Numonyx Axcell M29EW (SBC) from Spansion S29GL Flash (32, 64-, and 128 Mbit):  This application note describes how to convert a system design from Spansion S29GL (including P series and N series) Flash to Numonyx Axcell M29EW (SBC) Flash. AN-309014 11/2010 373.68 KB
Conversion Guide: Numonyx Axcell Flash Memory P33 Stack 256 Mbit/256Mbit (130nm) to 512 Mbit Monolithic (65nm):  This application note describes the migration from the Numonyx Axcell Flash Memory P33 256 Mbit/256 Mbit 130nm device to the Numonyx Axcell Flash Memory P33 512 Mbit monolithic 65nm device. AN-309015 11/2010 391.6 KB
Conversion Guide: Numonyx Axcell P30 Flash Memory (128 Mbit, 64 Mbit) 130nm to 65nm (Single Bit per Cell):  This application note describes the migration from the Numonyx Axcell P30-130nm flash memory to the Numonyx Axcell P30-65nm (SBC) flash memory. AN-309042 11/2010 252.4 KB
Conversion Guide: Numonyx Axcell P33 Flash Memory (128 Mbit, 64 Mbit) 130nm to 65nm SBC:  This application note describes the migration from the Numonyx Axcell P33-130nm flash memory to the Numonyx Axcell P33-65nm (SBC) flash memory. AN-309043 11/2010 251.17 KB
Convesion Guide: Numonyx Axcell Flash Memory P30 Stack 256 Mbit/256 Mbit (130nm) to 512 Mbit Monolithic (65nm):  This application note describes the migration from the Numonyx Axcell Flash Memory P30 256-Mbit/256-Mbit 130nm device to the Numonyx Axcell Flash Memory P30 512-Mbit monolithic 65nm device. AN-309044 11/2010 406.12 KB
How to operate Power Loss Recovery for the Numonyx 65nm Flash Memory Devices:  This application note describes guidelines on the operations a system designer must perform to recover the flash memory if power loss occurs during a modify operation on the main array of a Numonyx 65nm flash memory device. AN-309046 11/2010 61.37 KB
Migration Guide for Numonyx StrataFlash Wireless Memory (L18/L30) to Numonyx StrataFlash Embedded Memory (P30):  This application note describes migrating from the Numony StrataFlash Wireless Memory (L18/L30) to the Numonyx StrataFlash Embedded Memory (P30). AN-840 11/2010 216.05 KB
Numonyx StrataFlash Cellular Memory to ARM Primecell Design Guide:  This application note describes interfacing Numonyx StrataFlash Cellular Memory (M18 SCSP) to Advanced RISC Machines Limited (ARM) PrimeCell Synchronous Static Memory Controller (SSMC-PL093) and Multi-Port Memory Controller (MPMC-PL172). Also discusses the integrated features and control signals for interfacing the M18 flash memory and LPSDRAM to the SSMC and MPMC, respectively. AN-841 11/2010 465.39 KB
Migration Guide: Numonyx StrataFlash Synchronous Memory (K3) to Numonyx Embedded Flash Memory (J3 v. D):  This document describes the migration from the Numonyx StrataFlash Synchronous Memory (K3) to Numonyx Embedded Flash Memory (J3 v. D). AN-846 11/2010 227.93 KB
Migration Guide for Numonyx StrataFlash Wireless Memory (L18) to Numonyx StrataFlash Cellular Memory (M18):  This application note provides guidance for designing with Numonyx StrataFlash Wireless Memory (L18), pre-enabling a hardware design to support Numonyx StrataFlash Cellular Memory (M18). AN-822 11/2010 303.86 KB
Migration Guide: Numonyx StrataFlash Embedded Memory (P30) to Numonyx StrataFlash Embedded Memory (P33):  This document provides migration guidelines to convert system designs from the Numonyx StrataFlash Embedded Memory (P30) device to the Numonyx StrataFlash Embedded Memory (P33) device. AN-867 11/2010 104.79 KB
Migration Guide: Numonyx Serial Flash Memory (S33) to Numonyx M25P:  This document provides design guideline considerations for migrating from the Numonyx S33 Serial Flash Memory device to the Numonyx M25P Serial Flash Memory device. AN-868 11/2010 105 KB
Migration Guide for Numonyx StrataFlash Cellular Memory (M18), 90nm to 65nm:  This application note describes technical requirements to migrate from the Numonyx StrataFlash Cellular Memory (M18), 512 Mbit 90 nm device to the Numonyx StrataFlash Cellular Memory (M18), 1 Gbit 65nm device. It also highlights key differences and similarities between the 512 Mbit and 1 Gbit devices. AN-860 11/2010 163.5 KB
Migration Guide Intel W18-130/90nm to ST WR-65nm:  This application note describes migrating from the Intel Wireless Flash Memory (W18 130nm and 90nm) device to the ST Wireless Flash Memory (WR 65nm) device. AN-907 11/2010 93.66 KB
Conversion Guide: Numonyx Axcell Flash Memory P30 (256 Mbit, 256 Mbit/256 Mbit) 130nm to 65nm:  This application note describes the migration from the Numonyx Axcell Flash Memory (P30-65nm) device to the Numonyx Axcell Flash Memory (P30-130nm) device. AN-908 11/2010 389.19 KB
Conversion Guide: Numonyx Axcell Embedded Memory P33 (256 Mbit, 256 Mbit/256 Mbit) 130nm to 65nm:  This application note describes the migration from the Numonyx Axcell Flash Memory (P33-130nm) device to the Numonyx Axcell Flash Memory (P33-65nm) device. AN-909 11/2010 381.62 KB
Connecting a MPC56x Microcontroller to the M58BW016B/D Flash Memory:  This application note describes a method of connecting the M58BW016B/D Flash Memory to a MPC56x microcontroller without using glue logic. AN-1360 11/2010 244.7 KB
How to Migrate from the M95 SPI EEPROM to the M25PE SPI Serial Flash:  This application note describes how to migrate from the M95 family of SPI EEPROMs to the M25PE family of SPI Serial Flash memories. AN-2081 11/2010 314.02 KB
Differences between the M29W320DB/T and the M29W320EB/T Flash Memories:  This application note describes the differences between the M29W320D and the M29W320E Flash memories. AN-2308 11/2010 436.72 KB
How to Migrate to Numonyx Axcell M29EW (MLC) from Spansion Flash (S29GL 256 Mbit, 512 Mbit, 1 Gbit and S70GL 2 Gbit):  This application note describes how to convert a system design from Spansion S29GL (including P series and N series) and S70GL-P Flash to Numonyx Axcell M29EW (MLC) Flash. AN-108109 11/2010 312.7 KB
Migration Guide for Numonyx Advanced+ Boot Block Flash Memory (C3) to Numonyx Industry Standard Boot Block Flash Memory (M28W):  This document describes how to migrate from the Numonyx Advanced+ Boot Block Flash Memory (C3) 130nm device to the Numonyx Industry Standard Boot Block Flash Memory (M28W). AN-915 11/2010 194.27 KB
How to Migrate from the M58BW016DT/B to the M58BW016FT/B Flash Memories :  This Application note describes how to use the M58BW016FT/B in applications based on the M58BW016DT/B Flash memories. AN-2461 11/2010 186.06 KB
How to Power On and Power Off M58BW16F/32F and M58BW016D/F Flash Memories:  This application note describes how to power-on and power-off the M58BW16F/32F and M58BW016D/F Flash memory devices. AN-2601 11/2010 294.09 KB
How to Migrate from M29W128FH/L to M29W128GH/L Flash Memories :  This application note explains how to migrate an application based on the M29W128FH/L Flash memory to an M29W128GH/L Flash memory. AN-2663 11/2010 570.36 KB
How to Migrate from S29GL128P to M29W128GH/L Flash Memories:  This application note explains how to migrate an application based on the S29GL128P Flash memory to an M29W128GH/L Flash memory. AN-2685 11/2010 429.08 KB
Migrating from L30 Devices to LT Devices:  This document lists the differences between devices belonging to the L30 65nm technology family made by Intel and the LT 65nm technology family made by ST. AN-2721 11/2010 275.81 KB
Migrating from the M30L0T8000x2 to the M58LT256KTB:  This application note provides information about the differences between the M30L0T8000x2 (90nm) device and the M58LT256KTB (65nm) device that could have an impact on their application and usage. AN-3000 11/2010 265.89 KB
Migrating from the L18 Family in 130nm Technology to the LR Family in 65nm Technology:  This application note provides information about the differences between the L18 device family in 130nm and the LR device family in 65nm. This information is important for migrating from L18 devices to LR devices. AN-3003 11/2010 230.69 KB
Migrating from the Winbond 16-Mbit 1.8V Device to the M69KM024A:  This application note compares the specifications of the Winbond 16-Mbit, 1.8V device to the M69KM024A device for the purpose of migrating from one device to the other. AN-3004 11/2010 152.85 KB
Migration Guide: Numonyx M29W128G Flash to Numonyx 28F256M29EW Flash:  This application note describes how to upgrade a system design from Numonyx 128 Mbit M29W128G Flash to Numonyx 256 Mbit 28F256M29EW Flash. AN-308003 11/2010 480.76 KB
Conversion Guide: Numonyx StrataFlash Memory (J3C) to Numonyx Embedded Flash Memory (J3 v. D):  This document describes how to convert a system design from the Numonyx StrataFlash Memory (J3) device to the Numonyx StrataFlash Embedded Memory (J3 v. D) device. AN-835 11/2010 39.23 KB
How to Migrate to Numonyx M29W400D from Spansion S29AL004D Flash Memory :  This application note explains how to migrate an application based on the Spansion S29AL004D Flash memory device to an application based on the Numonyx M29W400D Flash memory device. AN-309005 11/2010 174.15 KB
How to Migrate to Numonyx M29W800D from Spansion S29AL008J/D Flash Memory:  This application note explains how to migrate an application based on the Spansion 1S29AL008D/J Flash memory device to an application based on the Numonyx M29W800D Flash memory device. AN-309006 11/2010 181.4 KB
How to Migrate to Numonyx M29W160E from Spansion S29AL016D/J/M and S29GL016A Flash Memory:  This application note explains how to migrate an application based on the Spansion S29AL016D/J or the S29GL016A Flash memory devices to an application based on the Numonyx M29W160E Flash memory device. AN-309007 11/2010 189.33 KB
How to Migrate to Numonyx M29W640G from Spansion S29GL064N Flash Memory:  This application note explains how to migrate an application based on the S29GL064N Flash memory to an M29W640G Flash memory. AN-309009 11/2010 242.74 KB
How to Migrate to Numonyx M29W320E from Spansion S29GL032N Flash Memory:  This application note explains how to migrate an application based on the S29GL032N Flash memory to an M29W320E Flash memory. AN-309010 11/2010 232.69 KB
How to Power On and Power Off the Numonyx Axcell M29F Flash Memory Device:  This application note provides guidelines for providing power to and removing power from the Numonyx Axcell M29F Flash memory device. AN-309016 11/2010 312.48 KB
How to Migrate to the Numonyx M29F family from the Spansion Am29F Family Flash Memory:  This application note explains how to migrate an application based on the Spansion Am29F200B, Am29F400B, Am29F800B, and Am29F160D Flash memory devices to an application based on the Numonyx M29F family Flash memory devices. AN-309017 11/2010 147.82 KB
Using XIP Modes in the Forte N25Q Flash Memory Device:  This technical note explains how to implement eXecute in Place (XiP) functionality in an application based on the Numonyx Forte N25Q Flash memory device family. TN-12-07 04/2011 213.9 KB
How to Migrate from Numonyx M25P128 130nm to 65nm Serial Flash:  This application note explains how to migrate an application based on the Numonyx M25P128 (130nm) to Numonyx M25P128 (65nm) serial Flash memory device. AN-309026 11/2010 49.9 KB
Spansion S29NS/WS-R to Numonyx StrataFlash Cellular Memory M Family Migration Guide:  This application note provides guidance for migrating from a system designed with a Spansion S29NS/WS-R Flash memory device to Numonyx StrataFlash Cellular Memory M family device, while retaining the Spansion layout. AN-309204 11/2010 113.97 KB
Spansion Flash Memory to Numonyx StrataFlash Wireless Memory (L) Migration Guide:  This application note provides information about migrating from a Spansion to a Numonyx L Flash memory device. AN-309205 11/2010 76.99 KB
How to Migrate from M29DW128FH/L to M29DW128GH/L Flash Memories:  This application note explains how to migrate an application based on the M29DW128FH/L Flash memory to an M29DW128GH/L Flash memory. AN-3102 11/2010 432.52 KB
Conversion Guide: Numonyx StrataFlash Wireless Memory (L18) 130nm to 65nm:  This application note describes converting from the Numonyx StrataFlash Wireless Memory (L18 130nm) to the Numonyx StrataFlash Wireless Memory (L18 65nm). AN-903 11/2010 178.17 KB
Conversion Guide: Numonyx Embedded Flash Memory J3 (128/128 Mbit Stacked to 256 Mbit Monolithic) 130nm to 65nm:  This document is written to assist customer conversion from Numonyx Embedded Flash Memory (J3 v. D) 128/128 Mbit stack to Numonyx StrataFlash Embedded Memory (J3-65nm) 256-Mbit Monolithic version on 65nm lithography, including explanation of key hardware and software differences. AN-308040 11/2010 141.3 KB
RealSSD Embedded USB Reliability Status Reporting:  TN-FD-02 11/2010 67.48 KB
Conversion Guide (256-Mbit): Numonyx Embedded Flash Memory (J3 v. D, 130 nm) to Numonyx StrataFlash Embedded Memory (J3, 65nm) :  This document describes the conversion from Numonyx Embedded Flash Memory (J3 v. D) to Numonyx StrataFlash Embedded Memory (J3-65 nm) on 65nm lithography, including an explanation of key hardware and software differences. AN-308041 11/2010 218.11 KB
Verilog Behavioral Model for M29W160EB/T Flash Memory:  This document describes the Verilog behavioral model for M29W160EB and M29W160ET Flash memory devices. UG-409020 11/2010 94.7 KB
Micron Wire-Bonding Techniques:  This technical note provides guidance on wire bonding techniques for both nickel-palladium (NiPd) and aluminum (Al) bond pads on Micron products. TN-00-22 11/2010 66.13 KB
Comparing Micron N25Q and Winbond W25Q Flash Devices:  Tech Note Comparing Micron N25Q and Winbond W25Q Flash Devices TN-12-17 07/2011 201.88 KB
Comparing Micron N25Q and SST SST26WF Flash Devices:  Tech Note Comparing Micron N25Q and SST SST26WF Flash Devices TN-12-16 07/2011 191.82 KB
Comparing Micron N25Q and Spansion S25FL Flash Devices:  Technical Note Comparing Micron N25Q and Spansion S25FL Flash Devices TN-12-15 07/2011 197.96 KB
Comparing Micron N25Q and Macronix MX25L Flash Devices:  Technical Note Comparing Micron N25Q and Macronix MX25L Flash Devices TN-12-14 07/2011 203.35 KB
Comparing Micron N25Q and M25PX Flash Devices:  Tech Note Comparing Micron N25Q and M25PX Flash Devices TN-12-13 07/2011 187.87 KB
Comparing Micron N25Q and M25P Flash Devices:  Tech Note Comparing Micron N25Q and M25P Flash Devices TN-12-12 07/2011 194.67 KB
T69M (50nm) to T79M (4xnm) Transition Guide:  A transition guide for customers using the T69M 2Gb 50nm (design rev. :A) and T79M replacement 2Gb 4xnm (design rev. :B) Micron Mobile LPDDR SDRAM devices. TN-46-22 03/2011 151.25 KB
TN-10-21: Qualcomm QSC6695 Validation Report:  Rev. 1.0 12/2011 336.51 KB
TN-10-21: Qualcomm QSC6695 Register Settings:  Rev. 1.0 12/2011 482.14 KB
Migrating from Atmel AT45DB011D to Micron M45PE10 Flash Devices:  This technical note describes the process for migrating from the Atmel Serial NOR Flash Memory device (AT45DB011D) to the Micron Serial NOR Flash memory device (M45PE10). TN-12-09 05/2011 198.99 KB
Migrating N25Q 3V, 128Mb Device:  This technical note explains how to migrate from the Micron® N25Q 3V, 128Mb parameter blocks serial NOR Flash device to the N25Q 3V, 128Mb uniform, subsector erase serial NOR Flash device. TN-12-10 06/2011 244.77 KB
TN_4622_t69m_t79m_trans_guide:  Transition guide for migration from T69M to T79M 06/2011 147.18 KB
TN-12-01: Migrating S29GL to M29AW NOR Flash Devices:  This technical note describes the process for converting a system design using Spansion® S29GL (all series) devices to Micron® M29AW multilevel cell (MLC) NOR Flash devices. TN-12-01 06/2011 242.08 KB
SDRAM I/O Characteristics Comparison of 54nm to 130nm Die:  This technical note compares the I/O characteristics of the 54nm to the 130nm single data rate (SDR) synchronous dynamic random access memory (SDRAM) die. TN-00-24 08/2011 515.31 KB
RLDRAM 3 Design Guide:  Contains practical recommendations for developing high-performance memory subsystems while ensuring stability for long-term reliable operation of the devices. TN-44-01 08/2011 723.41 KB
How to migrate to M29W256G Flash memories from S29GL256P :  The objective of this application note is to explain how to migrate an application based on the S29GL256P Flash memory to an M29W256GH/L Flash memory. The purpose of this document is not to provide detailed information on the devices, but to highlight the similarities and differences between them. AN-309018 09/2011 620.22 KB
Migrating from Macronix MX25L25635E to Micron N25Q 256Mb Flash:  Compares the features of the Macronix MX25L25635E and Micron N25Q (256Mb)Flash memory devices. TN-12-18 12/2011 226.89 KB
TN-11-08: MSM7x27A_Register Settings:  This Document outlines memory operations for LPDDR1 and NAND on the Qualcomm MSM7x27A and details the recommendations for memory register settings when interfacing with Micron NAND/LPDDR1 and eMMC. MSM7x27A 11/2011 482.14 KB
TN: MSM7x27A Validation Report Android 2.3:  Details the validation testing Micron has undertaken on the Qualcomm MSM7x30 Subscriber Unit Reference (SURF) board utilizing Micron NAND / LPDDR / and eMMC solutions. MSM7x27A 11/2011 336.51 KB
Enhanced Flash Driver (EFD) 2.2 User Guide:  This document describes the API and structures associated with the Enhanced Flash Driver 2.2. 11/2010 791.82 KB
Flash Data Integrator (FDI) 7.13 User Guide:  This document describes how to use the high-level structure, features, functional interfaces, and system requirements of the latest release of the FDI software for Flash memory-based file systems. 11/2010 1.32 MB
TN: PXA968 Register Settings:  This technical note outlines Mobile LPDDR and e-MMC operations with the PXA968 device, and 03/2012 267.27 KB
TN: PXA968 Validation Report Android 2.3:  This report highlights the validation testing Micron performed on the Marvell® PXA968 MG2 EVB board. The purpose of this testing was to validate Micron® 50nm and 43nm 200MHz Mobile Low-Power DDR SDRAM (Mobile LPDDR), and e-MMC v4.41 memory devices on the MG2 EVB platform. 03/2012 289.17 KB
Thermal Design Considerations of the Micron V100 WQVGA Engine:  Provides system design engineers with the thermal basics of the V100 engine, including describing methods for dissipating heat and calculating heat dissipation. TN-07-07 05/2011 138.21 KB
Video Data Processing in the Micron V100 WQVGA Engine:  Describes the video data processing so customers can experiment with font size and color to find the desired level of performance. TN-07-08 05/2011 92.15 KB
The SMART Command Feature Set for the RealSSD P400e Firmware 0135:  The intent of the SMART command feature set is to protect user data and minimize the likelihood of unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. TN-FD-05 01/2012 730.55 KB
Bypass Capacitor Selection for High-Speed Designs:  Describes bypass capacitor selection for high-speed designs. TN-00-06 03/2011 481.9 KB
Enabling a Flash Memory Device into the Linux MTD:  The technical note introduces the Linux memory technology device (MTD) architecture and provides a basis for understanding how to enable new devices and new features into the Linux MTD. TN-00-25 05/2011 528.81 KB
Measuring Luminous Flux and Contrast for Projection Engines:  Provides instructions for measuring the luminous flux (also referred to as brightness or lumens) and contrast for projection engines. It also explains these test procedures as defined by the American National Standards Institute (ANSI). TN-07-13 03/2012 215.27 KB
Optimizing Thermal Design for the E330 Projector Engine:  Provides basic thermal information for the E330 projector engine and discusses methods for dissipating heat. It also includes equations for calculating thermal resistance, the negative temperature coefficient, maximum LED power dissipation, and LED junction temperatures. TN-07-14 03/2012 233.32 KB
E330 Engine Mounting Instructions:  Instructions for mounting E330 Engine TN-07-15 05/2012 1.23 MB
TN-07-16: Preventing Image Sticking in Microdisplays:  This technical note explains the underlying cause for image sticking—a phenomenon that occurs during projection when an outline of a previously displayed image remains visible after being displayed for a long period of time—and provides best practices for preventing it. TN-07-16 05/2012 402.45 KB
TN-07-17 Addendum: RGB Input and Thermal Pattern:  This Microsoft Excel spreadsheet accompanies TN-07-17: Development Kit Power Consumption for the E330 Projector Engine and provides an easy way to calculate power consumption. TN-07-17 Addendum 05/2012 25.46 KB
TN-07-17: Development Kit Power Consumption for the E330 Projector Engine:  This technical note details the procedures for estimating E330 engine power consumption (the average power that factors into the individual LED duty cycle) when used with a Sagittarius development board. See accompanying TN-07-17 Addendum: RGB Input and Thermal Pattern. TN-07-17 05/2012 231.23 KB
Password Protecting Flash Memory Blocks:  This document describes a method of password protecting blocks using Micron's M29EW device as an example. TN-12-05 03/2011 404.22 KB
Adapting the Linux Kernel for Micron® P30, P33, and J3 Flash Memory:  This technical note provides a guide for modifying the MTD device-layer software for correct use with Micron P30, P33, and J3 devices. It also describes the modifications required in the Linux environment. TN-12-06 10/2011 304.48 KB
Software Device Drivers for Micron's N25Q Serial NOR Flash Memory:  This technical note provides a description of the C library source code for Micron N25Q serial NOR Flash memory devices. TN-12-11 02/2012 413.05 KB
Migrating from Spansion's S25FL256S to Micron's N25Q 256Mb Flash:  Compares features of Micron's 256Mb N25Q and Spansion's S25FL256S Flash memory devices TN-12-19 04/2012 243.96 KB
Migrating from Macronix's MX25L25635F to Micron's N25Q 256Mb Flash Device:  Migrating from Macronix's MX25L25635F to Micron's N25Q 256Mb Flash Device TN-12-20 05/2012 254.43 KB
Comparing P8P Parallel PCM and Parallel NOR Flash Memory:  Comparing the features of the 128Mb P8P parallel PCM and parallel NOR Flash memory devices enables users to migrate applications from NOR Flash to P8P parallel PCM. AN310053 11/2011 213.36 KB
Software Device Drivers for the Micron P5Q PCM Device:  This technical note describes the C library source code for the Micron P5Q phase change memory (PCM) device using the Micron software device driver. TN-13-04 03/2011 302.12 KB
Software Device Drivers for the Micron P8P Parallel PCM Device:  This technical note describes C library source code for the Micron P8P phase change memory (PCM) device using the P8P software device driver. TN-13-06 03/2011 238.6 KB
Extending PCM Temperature and Data Retention Ranges: Software Refresh Procedure:  This technical note describes a software procedure for refreshing data in Micron® P5Q serial phase change memory (PCM) and P8P parallel PCM devices to enable usage beyond current data sheet specifications. TN-13-07 06/2011 540.15 KB
Patching the Linux Kernel and U-Boot for Micron® M29 Flash Memory:  This technical note provides a guide for modifying the memory technology device (MTD) layer software for the purpose of correctly using Micron® M29 family Flash memory devices in a Linux environment. This document also describes the modifications required to make a Linux environment work with M29 Flash memory devices. TN-13-07 04/2011 551.89 KB
Micron Flash Data Integrator (FDI): Enabling the Second-Source Low-Level Driver:  The Micron Flash Data Integrator (FDI) low-level driver is the interface between the FDI software and the hardware Flash memory component. This document provides details for porting a second-source device into the FDI low-level driver. TN-13-08 11/2010 670.15 KB
Extending 90nm PCM Endurance from 1 Million WRITE Cycles Up to 1 Billion Cycles:  This technical note outlines a software solution called the parameter manager, which is used to increase the WRITE cycles for Micron's phase change memory (PCM) well beyond its standard endurance specifications. TN-13-09 11/2011 441.71 KB
Micron Flash Data Integrator (FDI) Support for Java Applications:  An instructional reference to customers of Micron's Flash Data Integrator (FDI). An OEM or ODM utilizing FDI in their design would use this application note to construct a comprehensive Java-enabled cellular/embedded system. TN-13-09 11/2010 1.52 MB
Software Drivers for M29W320DB and M29W320DT NOR Flash Memory:  This technical note provides library source code in C for M29W320DB and M29W320DT parallel NOR Flash memory. TN-13-10 11/2010 197.47 KB
Software Driver for M29AW NOR Flash Memory:  This technical note describes the library source code in C for the Micron M29AW parallel NOR Flash memory device using the Flash device driver software interface V3. TN-13-11 04/2011 242.67 KB
Software Driver for M29EW NOR Flash Memory:  This technical note describes the C library source code for the Micron M29EW parallel NOR Flash memory device using the Flash device driver software interface V3. TN-13-12 11/2010 279.15 KB
Software Device Drivers for Micron M29Fxx NOR Flash Memory:  This technical note provides C library source code for the M29Fxx Flash memory using the Flash software device driver interface. TN-13-13 11/2010 256.02 KB
Software Device Drivers for Micron® M29W256 NOR Flash Memory:  This technical note describes the library source code in C for the M29W256 Flash memory device using the Flash software device driver interface. TN-13-14 03/2011 282.92 KB
Software Device Drivers for M28W640C Parallel NOR Flash Memory:  This technical note describes the library source code in C for Micron's M28W640C Parallel NOR Flash Memory devices. TN-13-18 01/2012 310.28 KB
Software Device Drivers for G18 and M18 Family Parallel NOR Flash:  This technical note describes the library source code in C for G18 and M18 family parallel NOR Flash memory devices. TN-13-19 04/2012 358.49 KB
How to Read the Unique Identifier in Small Page NAND Memory:  Explains how to read unique ID in small page NAND memory. TN-2127 11/2011 121.44 KB
How to Read, Program, and Manage Small Page NAND OTP Memory Area:  Explains how to read, program, and manage small page NAND memory. TN-2603 11/2011 127.75 KB
Hamming Codes for NAND Flash Memories:  Outlines hamming codes NAND Flash memory TN-29-08 05/2007 229.46 KB
TN-29-56: Enabling On-Die ECC for OMAP3 on Linux/Android OS:  Enabling NAND On-Die ECC for OMAP3 Using Linux/Android OS with YAFFS2. M60A, M69A, M68A. TN-29-56 12/2010 331.14 KB
TN-29-57: Migrating from 50-Series to 60-Series SPI NAND:  Supplements the product change notification (PCN) covering the transition from Micron® 50-series (50nm) to 60-series (34nm) single-level cell (SLC) SPI NAND Flash devices. TN-29-57 05/2011 164.87 KB
TN-29-58: ONFI NV-DDR2 Design Guide:  Rev. A TN-29-58 03/2011 685.04 KB
Bad Block Management in NAND Flash Memory:  This technical note explains how to recognize factory-generated bad blocks and manage bad blocks that develop during the lifetime of NAND Flash memory. TN-29-59 10/2010 317.81 KB
Garbage Collection in SLC NAND Flash Memory:  This technical note describes the recommended garbage collection algorithm to be implemented in the Flash Translation Layer (FTL) software for single-level cell (SLC) NAND Flash memory devices. AN1821 10/2010 207.37 KB
Wear Leveling in NAND Flash Memory:  This technical note describes the recommended wear leveling algorithm to be implemented in the FTL software for NAND Flash memory. TN-29-61 10/2010 213.59 KB
Software Device Drivers for Large Page Micron NAND Flash Memory Devices:  This technical note explains how to use the Micron large page NAND Flash memory software device drivers. TN-29-62 10/2011 624.45 KB
Error Correction Code in SLC NAND Flash:  This technical note describes how to implement error correction code (ECC) in Micron small page and large page single-level cell (SLC) NAND Flash memory that can detect 2-bit errors and correct 1-bit errors per 256 or 512 bytes. TN-29-63 10/2010 486.67 KB
Software Device Drivers for Small Page Micron NAND Flash Memory:  This technical note explains how to use the Micron small page NAND Flash memory software drivers. TN-29-64 10/2010 889.73 KB
Software Device Drivers for Very Large Page Micron NAND Flash Memory:  This technical note explains how to use the Micron very large page NAND Flash memory software device drivers. TN-29-65 10/2010 405.64 KB
TN-2968 Addendum Boot Block Protection for M70M, M71M, M79M NAND:  04/2012 107.88 KB
Enabling Software BCH Error Correction Code (ECC) on a Linux Platform:  This technical note addresses applications using existing 1-bit ECC processors to enable Micron MT29F1GxxABxDA, MT29F2GxxABxEA, MT29F4GxxABxDA, and MT29F1GXXABXEA NAND Flash memory devices with software BCH ECC. TN-29-71 04/2012 688.7 KB
e·MMC Linux Enablement:  This technical note describes supported and unsupported e·MMC features and how to enable them in Linux. It includes a discussion of the e·MMC standard (4.41) introduced in March 2010. TN-52-05 03/2012 299.97 KB
TN-FD-06: P400e SATA SSD SMART Self-Test Reference:  This technical note describes the self-test modes, commands, values, and result checks for the self-monitoring, analysis, and reporting technology (SMART) used for the P400e SATA SSDs. TN-FD-06 12/2011 119.3 KB
TN-FD-07: Checking the e230 eUSB Bad Block Count:  TN-FD-07 01/2012 108.53 KB
TN-FD-08: e230 Firmware Update Instructions for Windows OS:  TN-FD-08 01/2012 129.09 KB
TN-FD-09: e230 Firmware Update Instructions for Linux OS:  TN-FD-09 01/2012 137.8 KB
The SMART Command Feature Set for the RealSSD™ P400e Firmware 0142:  The intent of the SMART command feature set is to protect user data and minimize the likelihood of unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. TN-FD-10 03/2012 740.86 KB

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