SORDIMM

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SORDIMM: Big Performance with a Small Footprint

Our small-outline registered DIMMs (SORDIMMs) provide data reliability through reduced address, command, control, and clock signal loading; temperature monitoring--all in a narrow form factor.

blue and green cables

SORDIMMs for Critical Networking Applications

Built for Networking and Communications
We’ve developed our SORDIMMs with the networking and communications industries in mind. We understand that these applications demand low latency, small memory footprints, pristine signal integrity, and stringent thermal specifications. And our SORDIMMs deliver--the right specifications and great reliability in a compact form factor.

SORDIMM Part Catalog and Documentation

Focused on Reliability
Our SORDIMMs are some of most reliable networking modules available--designed as mission-critical solutions. These modules use reduced address, command, control, and clock-signal loading to improve signal integrity. Next, our SORDIMMs include onboard temperature monitoring that provides real-time temperature measurement and warnings to avoid temperature-related failures

Impeccable Quality
We manage module manufacturing from beginning to end, designing in best-in-class DRAM components and working with board makers to ensure compatibility. We carefully test components, packaging, and the modules during the entire manufacturing process, and that involvement at every stage of memory development and manufacture ensures you'll consistently receive some of the best quality SORDIMM modules possible.

Features Benefits
Wide Density Range With densities from 512MB to 4GB, Micron’s SORDIMMs offer high density in a small form factor for space-limited designs
Flexible Configuration Available with ECC and single- or dual-rank support
PLL Provides better signal integrity to each component on the module
Buffered clock, command, and address signals Reduces the load on the memory controller, which ensures signal integrity and enables the system to accommodate the maximum number of modules
Simulation Models Our convenient thermal and electrical simulation models are available online for easy download
Temperature Sensor Takes real-time temperature measurements and provides warnings to prevent temperature-related failures

Type Secure Title & Description ID# Updated Size
Thermal Applications:  Defines a general method and criteria for measuring and ensuring that Micron components and modules do not exceed the maximum allowable temperature TN-00-08 05/2010 252.18 KB
Recommended Soldering Parameters:  Defines the recommended soldering techniques and parameters for Micron Technology, Inc., products. TN-00-15 03/2007 69.09 KB
Uprating of Semiconductors for High-Temperature Applications:  Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer's environmental specifications TN-00-18 05/2010 428.33 KB
Understanding Signal Integrity:  Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life TN-00-20 12/2009 1.52 MB
Memory Module Serial Presence-Detect:  Describes how SPD is essential in helping to standardize the configuration, timing, and manufacturing information of memory modules TN-04-42 12/2009 505.83 KB
Comparing Module Parameters:  Compares module parameters. TN-04-49 03/2003 52.71 KB
High-Speed DRAM Controller Design:  Identifies and discusses five key areas of DRAM controller design TN-04-54 04/2008 1 MB
DRAM Module Form Factors:  Compares the most common DRAM module form factors TN-04-55 09/2009 435.56 KB
Module Part Numbering Systems:  Part numbering guides for Micron DDR3, DDR, DDR, and SDRAM modules. 02/2012 41.77 KB
PCN/EOL Systems:  Explains Micron's product change notification and end-of-life systems. CSN-12 08/2009 75.58 KB
Wafer Packaging and Packaging Materials:  Provides complete shipping and recycling information about each of the materials used for shipping Micron's products. CSN-20 09/2011 776.24 KB
Bare Die SiPs and MCMs:  Describes design considerations for bare die SiPs and MCMs. CSN-18 04/2009 151.06 KB
Shipping Quantities:  Provides tables of part quantity. CSN-04 10/2011 463.55 KB
Micron Component and Module Packaging:  Explanation of Micron packaging labels and procedures. CSN-16 02/2012 840.61 KB
ESD Precautions for Die/Wafer Handling and Assembly:  Describes the benefits of controlling ESD in the workplace, including higher yields and improved quality and reliability, resulting in reduced manufacturing costs. CSN-24 08/2010 119.08 KB
Electronic Data Interchange:  Describes EDI transmission sets, protocol, and contacts. CSN-06 09/2005 53.5 KB
RMA Procedures for Packaged Product and Bare Die Devices:  Outlines standard returned material authorization (RMA) procedures, as well as the differences associated with bare die RMAs. CSN-07 10/2010 82.64 KB
ISO System Management Standards:  Describes ISO system management standards. CSN-08 04/2004 39.18 KB
Competitive DDR Memory Subsystems:  DDR milestones and platform design 12/2009 2.64 MB
DDR System Design Considerations:  DDR overview 12/2009 3.46 MB
The Future of Memory and Storage:  Overview of trends for main memory and Flash memory 12/2009 1.54 MB
Design Guide for Two DDR3-1066 UDIMM Systems:  Rev. B, Design guide to assist board designers implementing products using UDIMM systems TN-41-08 01/2010 1.1 MB
Moisture Absorption in Plastic Packages:  Describes shipping procedures for preventing memory devices from absorbing moisture and recommendations for baking devices exposed to excessive moisture TN-00-01 02/2010 87.26 KB
Accelerate Design Cycles with Simulation Models:  Micron supplies the tools and guidelines necessary to verify new designs prior to layout. This technical note discusses software model support, signal integrity optimization, and logic circuit design. TN-00-09 02/2010 206.91 KB
Micron Wire-Bonding Techniques:  This technical note provides guidance on wire bonding techniques for both nickel-palladium (NiPd) and aluminum (Al) bond pads on Micron products. TN-00-22 11/2010 66.13 KB
Micron BGA Manufacturer's User Guide:  Provides information to enable customers to easily integrate both leading-edge and legacy Micron's ball grid array (BGA) packages into their manufacturing processes. It is intended as a set of high-level guidelines and a reference manual describing typical package-related and manufacturing process-flow practices. CSN-33 07/2011 353.32 KB
Proper Handling Procedures for Micron DIMMs:  12/2009 396.18 KB
Proper Installation Procedures for Micron DIMMs:  12/2009 419.89 KB
Proper Installation Procedures for Micron SODIMMs:  12/2009 419.6 KB
Proper Handling of Micron DIMMs - Japanese:  12/2009 453.96 KB
Proper Installation of Micron DIMMs - Japanese:  12/2009 394.2 KB
Proper Installation of Micron SODIMMs - Japanese:  12/2009 483.52 KB
Proper Installation of Micron DIMMs - Simplified Chinese:  12/2009 592.58 KB
Proper Installation of Micron SODIMMs - Simplified Chinese:  12/2009 604.38 KB
Proper Handling of Micron DIMMs - Spanish:  12/2009 461.82 KB
Proper Installation of Micron DIMMs - Spanish:  12/2009 546.81 KB
Proper Installation of Micron SODIMMs - Spanish:  12/2009 542.23 KB
Proper Handling of Micron DIMMs - Traditional Chinese:  12/2009 539.92 KB
Proper Installation of Micron DIMMs - Traditional Chinese:  12/2009 758.93 KB
Proper Installation of Micron SODIMMs – Traditional Chinese:  12/2009 775.63 KB
Product Marks/Product and Packaging Labels:  Explains product part marking, and product and packaging labels. CSN-11 02/2012 666.83 KB
Bypass Capacitor Selection for High-Speed Designs:  Describes bypass capacitor selection for high-speed designs. TN-00-06 03/2011 481.9 KB

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Can Vtt and Vref be supplied by the same supply in my system design?
With proper decoupling this can be an acceptable design. However, Micron recommends ensuring all supplies are separated. Vref tends to have more noise on it because it supplies signals that are regularly switching. A robust design would typically not connect these supplies due to the possibility of introducing this noise onto the Vtt plane which should be as stable as possible. Additionally, Vref requires much less current than Vtt.
Is there a set of trace lengths and routing rules that are standard for use when designing a system that uses a specific module technology and form factor?
No. A robust memory subsystem design that includes the use of 1 or more memory modules must be simulated in order to determine the optimum trace lengths, terminations. However, our design guides such as TN-47-01 and TN-41-08 have some best practices and design examples based on some typical system assumptions. This information is not meant to be the only way your system can be designed. It is a starting point and moreover an example of the steps used to determine the best design for your system.

SORDIMM

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